The present invention generally pertains to the field of electronic circuits. More particularly, the present invention is related to a scheme for compensating for changes in amplifier offset voltages caused by load changes.
As is well understood, an operational amplifier is subject to voltage offset problems. For example, the amplifier 110 shown in FIG. 1A, has a output offset voltage Voo. This offset may be taken into account during analysis of closed loop configurations by referring it back to the input. Thus, the input offset voltage Vio may be obtained by dividing the output offset voltage by the open-loop gain of the amplifier (Av). Thus, the input offset voltage, which may be either negative or positive, may be defined as the voltage which needs to be applied between the input terminals to cause the output voltage to be zero volts (assuming the input terminals are tied together).
One technique for compensating for a DC offset problem is to capacitively couple the input of the amplifier. For example, by placing a capacitor between the negative input terminal and ground, the gain of the amplifier will be zero at DC. However, this technique is not possible if the amplifier is required to amplify DC signals or even low frequency signals.
A second technique for reducing an offset voltage is to increase the open-loop gain of the amplifier. However, to stabilize the amplifier and to change the phase margin, zeroes and poles may need to be added. Unfortunately, this requires the addition of resistors and capacitors. The added components not only increase the cost, but also take up additional chip real estate. This also applies in cases in which the op-amp is connected to external components to form another loop. External compensation would require more components to stabilize the loop if the open-loop gain of the op-amp is high. Saving chip real estate is especially critical when the application is intended for devices such as, cellphones, battery chargers, and other hand-held devices.
When compensating for offset voltages, a technique used to counter a relatively static offset voltage may not be effective to counter a dynamic offset voltage. Offset voltages may arise in many ways, with some factors leading to greater dynamic changes in the offset voltage than others. One cause of offset voltage is the amplifier configuration. In this case, the value of the offset voltage may be specified in the operational-amplifier""s data sheet. Some conventional amplifiers are provided with additional terminals that may be used to reduce the offset voltage. However, this technique may be ineffective when dealing with a changing offset voltage. A second cause of offset voltage is device mismatches. While this presents a special problem in that the offset is not known a priori, the effect of device mismatches on offset voltage may be relatively constant (not factoring in temperature effects).
However, in some cases the offset voltage changes during circuit operation. For example, the offset voltage may be proportional to the output load. Referring to the simplified output stage of FIG. 1B, the output stage may be either sourcing or sinking a current. As the magnitude of, for example, the current being sourced increases, the voltage at the drain of transistor Q5 changes, which results in an offset voltage. In a similar fashion, as the amount of current being sunk by transistor Q6 changes, the voltage at the drain of transistor Q5 may change. Thus, the offset voltage changes in response to the amount of current being sourced or sunk by the output. Because the load may change during circuit operation, the amount of compensation needs changes over time.
Thus, a need has arisen for a technique for reducing offset voltage in an operational amplifier. A further need has arisen for such a technique which compensates for an offset voltage that varies due to changing output loads. A still further need has arisen for a technique which does not require increasing the open-loop gain of the amplifier to reduce the effect of the offset voltage. A still further need has arisen for a technique that is economical with respect to circuit component costs. A still further need has arisen for a technique that conserves chip real estate.
The present invention provides a circuit for reducing offset voltage in an operational amplifier. Embodiments provide for techniques that compensate for an offset voltage that varies due to changing output loads. Embodiments provide for techniques that do not require increasing the open-loop gain of the amplifier to reduce the effect of the offset voltage. Embodiments provide for techniques that are economical and conserve chip real estate.
A circuit and method for countering offset voltage in an amplifier are disclosed. The circuit and method may be used to counter offset voltages induced by changes in output load. One embodiment comprises a method in which first an output current of an amplifier is sampled. A first compensation current which is a function of the output current is then created. The first compensation current is fed into an input stage of the amplifier to counter the offset voltage. Thus, changes to the offset voltage that are induced by changes in the output current are countered by the compensation current. In an additional embodiment, a second compensation current is created and fed into the input stage to act jointly with the first compensation current. In this fashion, higher order effects of the output current on the offset voltage may be countered. In one embodiment, the first compensation current is linearly related to the output current. In one embodiment, the second compensation current is exponentially related to the output current.
Another embodiment provides for a circuit for countering an offset voltage in an amplifier that is induced by changes to the output load. The circuit comprises an input stage, an output stage, and a first current compensation stage. Changes to an output current of the output stage may cause changes to the offset voltage. The first current compensation stage is coupled to the output stage and produces a first compensation current that is a function of the output current. The input stage is coupled to the first current compensation stage from which it receives the first compensation current. The input stage is configured such that the current injected into the input stage causes a change in the voltage between its input terminals.
In one embodiment, the circuit further comprises a second current compensation stage, which produces a second compensation current. The second compensation current is also fed into the input stage to act jointly with the first compensation current. In one embodiment, the first compensation current is linearly related to the output current. In one embodiment, the second compensation current is exponentially related to the output current.
These and other advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the various drawing figures.